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2009 Microchip Technology Inc.
DS39687E-page 17
PIC18F2XJXX/4XJXX FAMILY
4.2
Verify Code Memory and
Configuration Word
The verify step involves reading back the code memory
space and comparing it against the copy held in the
programmer’s buffer. Because the Flash Configuration
Words are stored at the end of program memory, it is
verified with the rest of the code at this time.
The verify process is shown in the flowchart in
Figure 4-2. Memory reads occur a single byte at a time,
so two bytes must be read to compare against the word
in the programmer’s buffer. Refer to Section 4.1
“Read Code Memory” for implementation details of
reading code memory.
FIGURE 4-2:
VERIFY CODE
MEMORY FLOW
4.3
Blank Check
The term “Blank Check” means to verify that the device
has no programmed memory cells. All memories must
be verified: code memory and Configuration bits. The
Device ID registers (3FFFFEh:3FFFFFh) should be
ignored.
A “blank” or “erased” memory cell will read as a ‘1’, so
Blank Checking a device merely means to verify that all
bytes read as FFh. The overall process flow is shown
in Figure 4-3.
Given that Blank Checking is merely code verification
with FFh expect data, refer to Section 4.2 “Verify Code
Memory and Configuration Word” for implementation
details.
FIGURE 4-3:
BLANK CHECK FLOW
Note:
Because the Flash Configuration Word
contains the device code protection bit,
code memory should be verified immedi-
ately after writing if code protection is
enabled. This is because the device will not
be readable or verifiable if a device Reset
occurs after the Flash Configuration Words
(and the CP0 bit) have been cleared.
Read Low Byte
Read High Byte
Does
Word = Expect
Data?
Failure,
Report
Error
All
Code Memory
Verified?
No
Yes
No
Set TBLPTR = 0
Start
Yes
Done
with Post-Increment
Yes
No
Start
Blank Check Device
Is
Device
Blank?
Continue
Abort
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